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1 ? fn6824.0 ISL32172E, isl32272e, isl32372e, isl32174e, isl32274e, isl32374e, isl32179e quad, 16.5kv esd protected, 3.0v to 5.5v, low power, rs-422 transmitters the intersil isl32x7xe are 16.5kv iec61000-4-2 esd protected, 3.0v to 5.5v powered, quad transmitters for balanced communication using the rs-422 standard. these drivers have very low output leakage currents ( 10a), so they present a low load to the rs-422 bus. driver (tx) outputs are tri-statable, and incorporate a hot plug feature to keep them disabled during power-up and down. versions are available with a common en/ en (?172 pinout), a two channel en12/en34 (?174 pinout), or a versatile combination of individual and group channel enables (see table 1). the isl32372e, isl32374e utilize slew rate limited drivers which reduce emi, and minimize reflections from improperly terminated transmission lines, or from unterminated stubs in multidrop and multipoint applic ations. drivers on the other versions are not limited, so they can achieve the 10mbps or 32mbps data rates. all versions are offered in industrial and extended industrial (-40c to +125c) temperature ranges. a 50% smaller footprint (compared to the tssop) is available with the isl32179e?s qfn package. this device also features a logic supply pin (v l ), that sets the switching points of the enable and di inputs to be compatible with a lower supply voltage in mixe d voltage systems. two speed select pins allow the isl32179e user to select from three slew rate options for 460kbps, 10mbps, or 32mbps data rates. individual channel and group enable pins increase the isl32179e?s flexibility. features ? iec61000 esd protection on rs-422 outputs . . 16.5kv - class 3 esd level on all other pins . . . . . . 12kv hbm - high machine model esd level on all pins . . . . . 700v ? wide supply range . . . . . . . . . . . . . . . . . . . 3.0v to 5.5v ? specified for +125c operation ? available in industry standard pinouts (?172/?174) or in a space saving qfn (isl32179e) with added features ? logic supply pin (v l ) eases operation in mixed supply systems (isl32179e only) ? user selectable data rate (isl32179e only) ? hot plug - tx outputs remain three-state during power-up and power-down ? low tx leakage allows > 256 devices on the bus ? high data rates . . . . . . . . . . . . . . . . . . . . . up to 32mbps ? low quiescent supply current . . . . . . . . . . 0.8ma (max) - low shutdown supply current . . . . . . . . . . . . . . . 60a ? current limiting and thermal shutdown for driver overload protection ? tri-statable tx outputs ? 5v tolerant logic inputs when v cc 5v ? pb-free (rohs compliant) applications ? telecom equipment ? motor controllers / encoders ? programmable logic controllers ? industrial/process control networks table 1. summary of features part number function data rate (mbps) slew-rate limited? hot plug? v l pin? tx enable type quiescent i cc (ma) low power shutdown? pin count ISL32172E 4 tx 32 no yes no en, en <1 no 16 isl32272e 4 tx 10 no yes no en, en <1 no 16 isl32372e 4 tx 0.46 yes yes no en, en <1 no 16 isl32174e 4 tx 32 no yes no en12, en34 <1 no 16 isl32274e 4 tx 10 no yes no en12, en34 <1 no 16 isl32374e 4 tx 0.46 yes yes no en12, en34 <1 no 16 isl32179e 4 tx 32, 10, 0.46 selectable yes yes indiv. and group enables <1 yes 24 data sheet december 16, 2008 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2008. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 fn6824.0 december 16, 2008 pinouts ISL32172E, isl32272e, isl32372e (16 ld n-soic, tssop) top views isl32174e, isl32274e, isl32374e (16 ld n-soic, tssop) top views isl32179e (24 ld qfn) top view 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 di1 y1 z1 en z2 y2 gnd di2 v cc y4 z4 en z3 y3 di3 di4 d d d d 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 di1 y1 z1 en12 z2 y2 gnd di2 v cc y4 z4 en34 z3 y3 di3 di4 d d d d y1 di1 shdnen v cc v l di4 di2 spa gnd spb di3 y3 z1 en1 en2 en z2 y2 y4 z4 en4 en3 en z3 1 2 3 4 5 6 18 17 16 15 14 13 24 23 22 21 20 19 789101112 ordering information part number (notes 1, 2) part marking temp. range (c) package (pb-free) pkg. dwg. # ISL32172Efbz isl32172 efbz -40 to +125 16 ld soic m16.15 ISL32172Efvz 32172 efvz -40 to +125 16 ld tssop mdp0044 ISL32172Eibz isl32172 eibz -40 to +85 16 ld soic m16.15 ISL32172Eivz 32172 eivz -40 to +85 16 ld tssop mdp0044 isl32174efbz isl32174 efbz -40 to +125 16 ld soic m16.15 isl32174efvz 32174 efvz -40 to +125 16 ld tssop mdp0044 isl32174eibz isl32174 eibz -40 to +85 16 ld soic m16.15 isl32174eivz 32174 eivz -40 to +85 16 ld tssop mdp0044 isl32179efrz 321 79efrz -40 to +125 24 ld qfn l24.4x4c isl32179eirz 321 79eirz -40 to +85 24 ld qfn l24.4x4c isl32272efbz isl32272 efbz -40 to +125 16 ld soic m16.15 isl32272efvz 32272 efvz -40 to +125 16 ld tssop mdp0044 isl32272eibz isl32272 eibz -40 to +85 16 ld soic m16.15 isl32272eivz 32272 eivz -40 to +85 16 ld tssop mdp0044 ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
3 fn6824.0 december 16, 2008 isl32274efbz isl32274 efbz -40 to +125 16 ld soic m16.15 isl32274efvz 32274 efvz -40 to +125 16 ld tssop mdp0044 isl32274eibz isl32274 eibz -40 to +85 16 ld soic m16.15 isl32274eivz 32274 eivz -40 to +85 16 ld tssop mdp0044 isl32372efbz isl32372 efbz -40 to +125 16 ld soic m16.15 isl32372efvz 32372 efvz -40 to +125 16 ld tssop mdp0044 isl32372eibz isl32372 eibz -40 to +85 16 ld soic m16.15 isl32372eivz 32372 eivz -40 to +85 16 ld tssop mdp0044 isl32374efbz isl32374 efbz -40 to +125 16 ld soic m16.15 isl32374efvz 32374 efvz -40 to +125 16 ld tssop mdp0044 isl32374eibz isl32374 eibz -40 to +85 16 ld soic m16.15 isl32374eivz 32374 eivz -40 to +85 16 ld tssop mdp0044 notes: 1. add ?-t? suffix for tape and reel. please refer to tb347 for details on reel specifications. 2. these intersil pb-free plastic packaged pr oducts employ special pb-free material sets , molding compounds/die attach materials , and 100% matte tin plate plus anneal (e3 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering opera tions). intersil pb-free products are msl classified at pb-fr ee peak reflow temperatures that meet or exceed the pb-free requirements of ipc/jed ec j std- 020 ordering information (continued) part number (notes 1, 2) part marking temp. range (c) package (pb-free) pkg. dwg. # truth tables ISL32172E, isl32272e, isl32372e inputs outputs en en dix zx yx x 0 1/0 0/1 1/0 1 x 0/1 1/0 0/1 01 x z z note: z = tri-state isl32174e, isl32274e, isl32374e inputs outputs en12en34dixz1y1z2y2z3y3z4y4 0 0 xzzzzzzzz 0 1 1/0 z z z z 0/1 1/0 0/1 1/0 1 0 1/0 0/1 1/0 0/1 1/0 z z z z 1 1 1/0 0/1 1/0 0/1 1/0 0/1 1/0 0/1 1/0 note: z = tri-state isl32179e inputs outputs enx en en dix spa spb zx yx comments 0 x x x x x z z chan x outputs disabled x 0 1 x x x z z all outputs disabled 1 x 0 1/0 1 1 0/1 1/0 individual enx controls chan x (32mbps) 1 1 x 0/1 1 1 1/0 0/1 1 x 0 1/0 0 1 0/1 1/0 individual enx controls chan x (10mbps) 1 1 x 0/1 0 1 1/0 0/1 1 x 0 1/0 x* 0 0/1 1/0 individual enx controls chan x (460kbps) 1 1 x 0/1 x* 0 1/0 0/1 note: *keep spa = 1 for lowest current in shdn. if using individual channel enables, and the shdn mode, connect en and en to v cc for the lowest shdn current. isl32179e enters shdn when shdnen = 1 and all channels are disabled. z = tri-state. ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
4 fn6824.0 december 16, 2008 pin descriptions pin function en, en group driver output enables, that are internally pulled high to v cc . all isl32x72e driver outputs, y and z, are enabled by driving en high or en low, and the outputs are high impedance when en is low and en is high (i.e., if using only the active high en, connect en directly to v cc or v l ; if using only the active low en , connect en directly to gnd). on the isl32179e accomplish group enable by connecting all the enx pins to v cc or v l , and then use the en or en pin as previously described. if the group driver enable function isn?t required (see note), connect en to v cc , or connect en to gnd. (isl32x72e and isl32179e only) en12, en34 paired driver output enables, that are internally pulled high to v cc . driving en12 (en34) high e nables channel 1 and 2 (3 and 4) outputs (y and z). driving en12 (en34) low disables channel 1 and 2 (3 and 4) outputs. if the driver enable function isn?t requ ired (see note), connect en12 and en34 to v cc . (isl32x74e only) enx individual driver output enables that are internally pulled high to v cc . forcing enx high (along with en high or en low) enables the channel x outputs (y and z). driving enx low disables the channel x outputs, regardless of the states of en and en . connect both en and en to v cc for the lowest shdn current if utilizing shdn mode (see shdnen below). if the indi vidual driver enable function isn?t required (see note), connect enx to v cc . (isl32179e only) shdnen low power shdn mode enable. a high level allows the is l32179e to enter a low power mode when all channels are disabled. a low level prevents the device from entering the low power mode. (isl32179e only) dix driver input. a low on di forces the corresponding channel?s output y low and output z high. similarly, a high on di forces output y high and output z low. spa, spb speed select inputs that are internally pull ed-high. see isl32179e truth table on page 3. (isl32179e only) gnd ground connection. this is also th e potential of the qfn thermal pad. yx 16.5kv iec61000-4-2 esd protected rs- 422 level, noninverting transmitter output. zx 16.5kv iec61000-4-2 esd protected rs-422 level, inverting transmitter output. v cc system power supply input (3.0v to 5.5v). on devices with a v l pin, power-up v cc first. v l logic power supply input. connecting the v l pin to the lower voltage power supply of a logic device (e.g., uart or controller) interfacing with the isl32179e tailors its logic pi n (di, en (all varieties), shdnen, and sp) v il /v ih levels to values compatible with the lower supply voltage. power-up this supply after v cc , and keep v l v cc . (isl32179e only) note: unused en pins of any type should not be left floating, even though they have internal pull-ups. ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
5 fn6824.0 december 16, 2008 typical operating circuits (1 of 4 channels shown) network using group enables network using paired enables network with v l pin for interfacing to lower voltage logic devices 0.1f + r 2 1 16 3 12 8 v cc gnd ro en b a +3.3v to 5v 0.1f + d v cc gnd en di z y r t +3.3v to 5v isl32x73e isl32x72e 1 4 8 3 2 16 en 12 en 4 0.1f + r 2 1 16 3 8 v cc gnd ro1 b1 a1 +3.3v to 5v 0.1f + d v cc gnd en12 di1 z1 y1 r t +3.3v to 5v isl32x75e isl32x74e 4 1 8 3 2 4 en12 16 0.1f + r 24 23 22 1 2 10 v cc gnd ro1 en1 b1 a1 +3.3v to 5v 0.1f + d 1 24 21 4 23 9 v cc gnd en di z y r t +3.3v to 5v isl32x77e isl32179e 20 v l 2.5v 21 v l 1.8v v cc logic device uart) v cc logic device (p, asic, uart) 2,3,15,16 en1-en4 14 en 22 shdnen 4 en 15 en 9 shdnen using individual channel enables and configured for lowest shdn supply current using active high group enable and configured for lowest shdn supply current note: power-up v cc before v l note: power-up v cc before v l p, asic, ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
6 fn6824.0 december 16, 2008 absolute maximum rati ngs thermal information v cc to gnd. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7v v l to gnd (isl32179e only) . . . . . . . . . . . . . -0.3v to (v cc +0.3v) input voltages di, en (all varieties) . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 7v output voltages y, z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to 7v output current y, z (per output, continuous, t j 125c) . . . . . . . . . . . . 100ma esd rating . . . . . . . . . . . . . . . . . . . . . . . . . see specification table thermal resistance (typical) ja (c/w) jc (c/w) 16 ld soic package (note 3) . . . . . . . 80 n/a 16 ld tssop package (note 3) . . . . . 105 n/a 24 ld qfn package (notes 4, 5). . . . . 42 5 maximum junction temperature (plastic package) . . +150c maximum storage temperature range . . . . . . . . . .-65c to +150c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp operating conditions temperature range isl32x7xef . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40c to +125c isl32x7xei. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40c to +85c caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. note: 3. ja is measured with the component mounted on a high effective therma l conductivity test board in free air. see tech brief tb379 f or details. 4. ja is measured in free air with the component mounted on a high ef fective thermal conductivity te st board with ?direct attach? fe atures. see tech brief tb379 for details. 5. for jc , the ?case temp? location is the center of the exposed metal pad on the package underside. electrical specifications test conditions: v cc = 3.0v to 3.6v and 4.5v to 5.5v; v l = v cc (isl32179e only); typicals are at v cc = 3.3v or v cc = 5v, t a = +25c; unless otherwise specified.(notes 6, 10) parameter symbol test conditions temp (c) min (note 9) typ max (note 9) units dc characteristics differential v out v od no load full 2.5 - v cc r l = 100 (rs-422) (see figure 1) v cc 3v full 2 2.6 - v v cc 4.5v full 3 4 - v single-ended v out (y or z) v o i o = -20ma, v oh full 2.4 2.7 - v i o = 20ma, v ol full - 0.2 0.4 v change in magnitude of driver differential v out for complementary output states v od r l = 100 (see figure 1) full - 0.01 0.2 v driver common-mode v out v oc r l = 100 (see figure 1) full - 2.6 3 v change in magnitude of driver common-mode v out for complementary output states v oc r l = 100 (see figure 1) full - 0.01 0.2 v input high voltage (logic pins, note 14) v ih1 v l = v cc if isl32179e v cc 3.6v full 2.2 - - v v ih2 v cc 5.5v, di full 2.7 - - v v ih2e v cc 5.5v, ens full 2.4 - - v v ih3 2.7v v l < 3.0v (isl32179e only) full 2 - - v v ih4 2.3v v l < 2.7v (isl32179e only) full 1.6 - - v v ih5 1.6v v l < 2.3v (isl32179e only) full 0.72*v l --v v ih6 1.5v v l < 1.6v (isl32179e only) 25 - 0.45*v l -v input low voltage (logic pins, note 14) v il1 v l = v cc if isl32179e full - - 0.8 v v il2 v l 2.7v (isl32179e only) full - - 0.6 v v il3 2.3v v l < 2.7v (isl32179e only) full - - 0.6 v v il4 1.6v v l < 2.3v (isl32179e only) full - - 0.22*v l v v il5 1.5v v l < 1.6v (isl32179e only) 25 - 0.25*v l -v ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
7 fn6824.0 december 16, 2008 logic input current i in1 dix = 0v or v cc full -1 - 1 a i in2 sp, en, en , enx, shdnen = 0v or v cc full -15 9 15 a i in3 en12, en34 = 0v or v cc full -30 18 30 a output leakage current (y, z) i oz en = 0, v cc = 0v to 5.5v, -0.25 v o 6v full -10 - 10 a en = 0, v cc = 3v to 5.5v, v o = 0v to v cc 25 -8 - 8 na (note 16) -30 - 30 na driver short-circuit current, v o = high or low i osd1 en = 1, v y or v z = 0v (note 7) full - - 150 ma en = 1, v y or v z = v cc (note 7) full - - 200 ma thermal shutdown threshold t sd full - 160 - c supply current no-load supply current i cc di = 0v or v cc , en = 1 full - 0.6 0.8 ma shutdown supply current i shdn di = 0v or v cc , all outputs disabled (note 15), shdnen = 1 (isl32179e only) full - 60 90 a esd performance rs-422 pins (y, z) iec61000-4-2, from bus pins to gnd air gap 25 - 16.5 - kv contact 25 - 9 - kv human body model, from bus pins to gnd 25 - 15 - kv all pins hbm, per mil-std-883 method 3015 25 - 12 - kv machine model 25 - 700 - v driver switching characteristics (isl32372e, isl32374e, isl32179e, 460kbps) maximum data rate f max v od = 1.5v, c d = 820pf (see figure 4) full 460 4000 - kbps driver single-ended output delay t plh, t phl r diff = 100 , c d = 50pf (see figure 2) full - 90 300 ns driver single-ended output skew t ssk r diff = 100 , c d = 50pf (see figure 2) full - 55 150 ns ch-to-ch output delay skew t skcc (figure 2, note 11) full - 60 200 ns part-to-part output delay skew t skpp (figure 2, note 8) full - - 300 ns driver differential output skew t dsk r diff = 100 , c d = 50pf (see figure 2) full - 2 60 ns driver differential rise or fall time t r , t f r diff = 100 , c d = 50pf (see figure 2) full 60 100 220 ns driver enable to output high t zh sw = gnd (see figure 3, note 12) full - - 200 ns driver enable to output low t zl sw = v cc (see figure 3, note 12) full - - 200 ns driver disable from output high t hz sw = gnd (see figure 3) full - - 100 ns driver disable from output low t lz sw = v cc (see figure 3) full - - 100 ns driver enable from shdn to high t sdh isl32179e only, sw = gnd (see figure 3, note 13) full - - 750 ns driver enable from shdn to low t sdl isl32179e only, sw = v cc (see figure 3, note 13) full - - 750 ns driver switching characteristics (isl32272e, isl32274e, isl32179e, 10mbps) maximum data rate f max v od = 1.5v, c d = 400pf (see figure 4) full 10 20 - mbps driver single-ended output delay t plh, t phl r diff = 100 , c d = 50pf (see figure 2) full - 13 25 ns driver single-ended output skew t ssk r diff = 100 , c d = 50pf (see figure 2) full - 2 9 ns ch-to-ch output delay skew t skcc (figure 2, note 11) full - 6 12 ns part-to-part output delay skew t skpp (figure 2, note 8) full - - 20 ns driver differential output skew t dsk r diff = 100 , c d = 50pf (see figure 2) full - 2 6 ns driver differential rise or fall time t r , t f r diff = 100 , c d = 50pf (see figure 2) full 7 11 20 ns driver enable to output high t zh sw = gnd (see figure 3, note 12) full - - 20 ns driver enable to output low t zl sw = v cc (see figure 3, note 12) full - - 20 ns electrical specifications test conditions: v cc = 3.0v to 3.6v and 4.5v to 5.5v; v l = v cc (isl32179e only); typicals are at v cc = 3.3v or v cc = 5v, t a = +25c; unless otherwise specified.(notes 6, 10) (continued) parameter symbol test conditions temp (c) min (note 9) typ max (note 9) units ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
8 fn6824.0 december 16, 2008 driver disable from output high t hz sw = gnd (see figure 3) full - - 20 ns driver disable from output low t lz sw = v cc (see figure 3) full - - 20 ns driver enable from shdn to high t sdh isl32179e only, sw = gnd (see figure 3, note 13) full - - 750 ns driver enable from shdn to low t sdl isl32179e only, sw = v cc (see figure 3, note 13) full - - 750 ns driver switching characteristics (ISL32172E, isl32174e, isl32179e, 32mbps) maximum data rate f max v od = 1.5v, c d = 100pf (see figure 4) full 32 50 - mbps driver single-ended output delay t plh, t phl r diff = 100 , c d = 50pf (see figure 2) full 3 8 15 ns driver single-ended output skew t ssk r diff = 100 , c d = 50pf (see figure 2) full - 1 3.5 ns ch-to-ch output delay skew t skcc (figure 2, note 11) full - 3 5.5 ns part-to-part output delay skew t skpp (figure 2, note 8) full - - 8 ns driver differential output skew t dsk r diff = 100 , c d = 50pf (see figure 2) full - 0.5 2 ns driver differential rise or fall time t r , t f r diff = 100 , c d = 50pf (see figure 2) full - 7 12 ns driver enable to output high t zh sw = gnd (see figure 3, note 12) full - - 20 ns driver enable to output low t zl sw = v cc (see figure 3, note 12) full - - 20 ns driver disable from output high t hz sw = gnd (see figure 3) full - - 20 ns driver disable from output low t lz sw = v cc (see figure 3) full - - 20 ns driver enable from shdn to high t sdh isl32179e only, sw = gnd (see figure 3, note 13) full - - 750 ns driver enable from shdn to low t sdl isl32179e only, sw = v cc (see figure 3, note 13) full - - 750 ns notes: 6. all currents into device pins are posi tive; all currents out of device pins are negative. all voltages are referenced to devi ce ground unless otherwise specified. 7. applies to peak current. see ?typical performanc e curves? beginning on page 12 for more information. 8. t skpp is the magnitude of the difference in propagation delays of the s pecified terminals of two units tested with identical test con ditions (v cc , temperature, etc.). 9. parameters with min and/or max limits are 100% tested at +25 c, unless otherwise specified. temperature limits established by characterization and are not production tested. 10. en = 0 indicates that the output(s) under test are disabled vi a the appropriate logic pin settings. en = 1 indicates that th e logic pins are set to enable the output(s) under test. 11. channel-to-channel skew is the magnitude of the worst case delta between any two propagation delays of any two outputs on th e same ic, at the same test conditions. 12. for isl32179e, keep shdnen low to avoid entering shdn. 13. keep shdnen high to enter shdn when all transmitters are disabled (isl32179e only). 14. logic pins are the dis, the enable variants, and shdnen. 15. only one of the spx pins low, plus en1-en4 low with en and en high, or en low and en high with en1-en4 high. 16. temperature range is -20c to +40c. electrical specifications test conditions: v cc = 3.0v to 3.6v and 4.5v to 5.5v; v l = v cc (isl32179e only); typicals are at v cc = 3.3v or v cc = 5v, t a = +25c; unless otherwise specified.(notes 6, 10) (continued) parameter symbol test conditions temp (c) min (note 9) typ max (note 9) units ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
9 fn6824.0 december 16, 2008 test circuits and waveforms figure 1. dc driver test circuits figure 2a. test circuit figure 2b. measurement points figure 2. driver propagation delay and differential transition times figure 3a. test circuit figure 3b. measurement points figure 3. driver enable and disable times d en di v cc or v l v od v oc r l /2 r l /2 z y d en di v cc or v l signal generator c d r diff z y out (z) lower of v cc or v l 0v 1.5v 1.5v v oh v ol out (y) t phl t plh diff out (y - z) t r +v od -v od 90% 90% t f 10% 10% di t dsk = |t ddlh - t ddhl | t ssk = |t plh(y or z) - t phl(z or y) | 50% 50% 0v t ddlh t ddhl 0v 50% 50% t plh t phl v oh v ol t ssk t ssk d en di z y v cc gnd sw parameter output di sw t hz y/z 1/0 gnd t lz y/z 0/1 v cc t zh (note 12) y/z 1/0 gnd t zl (note 12) y/z 0/1 v cc t sdh (note 13) y/z 1/0 gnd t sdl (note 13) y/z 0/1 v cc signal generator 110 50pf out (y, z) 3v or v l 0v 1.5v 1.5v v oh 0v v oh - 0.5v t hz out (y, z) v cc v ol v ol + 0.5v t lz en output high output low t zl t zh 50% 50% t sdh t sdl ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
10 fn6824.0 december 16, 2008 application information rs-422 is a differential (balanced) data transmission standard for use in long haul or noisy environments. rs-422 is a point-to-multipoint (multi drop) standard, which allows only one driver and up to 10 (assuming one unit load devices) receivers on each bus. driver features these rs-422 drivers are diff erential output devices that deliver at least 2v across a 100 load. the drivers feature low propagation delay skew to maximize bit width, and to minimize emi. the 460kbps driver outputs are slew rate limited to minimize emi, and to reduce reflections in unterminated or improperly terminated networks. outputs of the 10mbps and 32mbps drivers are not limited, so faster output transition times allow the higher data rates. driver enable functions all product types include functi onality to allow disabling of the tx outputs. the isl32x72e ty pes feature group (all four tx) enable functions that are active high (en) or active low (en ). drivers enable when en = 1, or when en = 0, and they disable only when en = 0 and en = 1. isl32x74e versions use active high paired enable functions (en12 and en34) that enable (when high) or disable (when low) the corresponding pairs of tx. all four of these enable pins have internal pull-up resistors to v cc , but unused enable pins that need to be high (e.g., en when using the en input for enable control, or en12 and en34 when using always enabled drivers) should always be connected externally to v cc . if v cc transients might exceed 7v, then inserting a series resistor between the input(s) and v cc limits the current that will flow if the input?s esd protection starts conducting. the isl32179e has the most flexible enable scheme. its six enable pins allow for group, paired, or individual channel enable control. figure 5 details the isl32179e?s internal enable logic. to utilize a group enable function, connect all the enx pins high, and handle the en and en pins as described in the previous paragraph. for paired enables, connect en and en high (for the lowest current in shdn mode, if shdn is used) and tie en1 and en2 together, and en3 and en4 together. for individual channel enables, again connect en and en high, and drive the appropriate enx (active high) for the particular channel. all of the enable pins incorporate pull-up resistors to v cc , but unused enable pins of any type should be externally connected high, rather than being left floating. connecting to v cc is the best choice, but v l may be utilized as long as shdn power isn?t a primary concern (for each v l connected input, i cc increases by ((v cc - v l )/600k ). if v cc or v l transients might exceed 7v, then inserting a series resistor between the input(s) and the supply limits the current that will flow if the input?s esd protection starts conducting. wide supply range these ics are designed to operate with a wide range of supply voltages from 3.0v to 5.5v, and they meet the rs-422 specifications for th at full supply voltage range. 5.5v tolerant logic pins logic input pins (driver inputs, enables, shdnen) contain no esd nor parasitic diodes to v cc (nor to v l ), so they withstand input voltages exceeding 5.5v regardless of the v cc and v l voltages. input voltages up to 7v are easily tolerated. logic supply (v l pin, isl32179e only) note: power-up v cc before powering up the v l supply. if unused enable pins are connected to v l rather than to v cc , then a small i cc ((v cc - v l )/600k ) will flow due to the internal pull-up resistor connecting to v cc . the isl32179e includes a v l pin that powers the logic inputs (driver inputs, enables, shdnen). these pins interface with ?logic? devices such as uarts, asics, and figure 4a. test circuit figure 4b. measurement points figure 4. driver data rate test circuits and waveforms (continued) d en di v cc or v l signal generator z y c d v od + - 100 lower of v cc or v l 0v diff out (y - z) +v od -v od di 0v figure 5. isl32179e enable logic 1 of 4 channels v cc v cc v cc enx en en chx en ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
11 fn6824.0 december 16, 2008 controllers, and today most of these devices use power supplies significantly lower than 3.3v. thus, the logic device?s low v oh might not exceed the v ih of a 3.3v or 5v powered di or enable input. connecting the v l pin to the power supply of the logic device (as shown in figure 6) reduces the di and enable input switching points to values compatible with the logic device?s output levels. tailoring the logic pin input switching points to the supply voltage of the uart, asic, or controller el iminates the need for a level shifter/translator between the two ics. v l can be anywhere from v cc down to 1.5v, and table 2 indicates typical v ih and v il values for various v l settings so the user can ascertain whether or not a particular v l voltage meets his needs. hot plug function when a piece of equipment powers up, there is a period of time where the processor or asic driving the rs-422 control lines (en, en , enx) is unable to ensure that the rs-422 tx outputs remain disabled. if the equipment is connected to the bus, a driver activating prematurely during power-up may drive invalid data on the bus. to avoid this scenario, this family incorporates a ?hot plug? function. during power-up, circuitry monitoring v cc ensures that the tx outputs remain disabled for a period of time, regardless of the state of the enable pins. this gives the processor/asic a chance to stabilize and drive the rs-422 cont rol lines to the proper states. esd protection all pins on these devices include class 3 (>12kv) human body model (hbm) esd prot ection structures, but the rs-422 pins (driver output s) incorporate advanced structures allowing them to survive esd events in excess of 15kv hbm, and 16.5kv to iec61000-4-2. the rs-422 pins are particularly vul nerable to esd damage because they typically connect to an expo sed port on the exterior of the finished product. simply touching the port pins, or connecting a cable, can caus e an esd event that might destroy unprotected ics. these new esd structures protect the device whether or not it is powered up, and without degrading the rs-422 common mode range of -0.3v to +6v. this built-in es d protection eliminates the need for board level protection structures (e.g., transient suppression diodes), and th e associated, undesirable capacitive load they present. iec61000-4-2 testing the iec61000 test method applies to finished equipment, rather than to an individual ic. therefore, the pins most likely to suffer an esd event are t hose that are ex posed to the outside world (the rs-422 pins in this case), and the ic is tested in its typical application configuration (power applied) rather than testing each pi n-to-pin combination. the iec61000 standard?s lower current limiting resistor coupled with the larger charge storage capacitor yields a test that is much more severe than the hbm test. the extra esd protection built into this dev ice?s rs-422 pins allows the design of equipment meeting level 4 criteria without the need for additional board level pr otection on the rs-422 port. air-gap discharge test method for this test method, a charged probe tip moves toward the ic pin until the voltage arcs to it. the current waveform delivered to the ic pin depends on approach speed, humidity, temperature, etc., so it is difficult to obtain repeatable results. the rs-422 pins withstand 16.5kv air-gap discharges. contact discharge test method during the contact discharge test, the probe contacts the tested pin before the probe tip is energized, thereby eliminating the variables associated with the air-gap table 2. v ih and v il vs v l for v cc = 3.3v or 5v v l (v) v ih (v) v il (v) 1.6 0.7 0.45 2 0.85 0.6 2.3 1.1 0.75 2.7 1.4 (di), 1.1 (ens) 0.85 2.7 2 0.8 3.3 2.2 0.8 figure 6. using v l pin to adjust logic levels gnd t xd den v cc = +2v uart/processor gnd di en v cc = +3.3v ISL32172E v oh 2 v ih 2 gnd t xd den v cc = +2v uart/processor gnd di en v cc = +3.3v isl32179e v oh 2 v ih = 0.85v v ih = 0.85v v l v oh 2 v ih 2 v oh 2 ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
12 fn6824.0 december 16, 2008 discharge. the result is a more repeatable and predictable test, but equipment limits prevent testing devices at voltages higher than 9kv. devices in this family survive 9kv contact discharges on the rs-422 pins. data rate, cables , and terminations rs-422 is intended for network lengths up to 4000?, but the maximum system data rate decr eases as the transmission length increases. devices operating at 32mbps handle lengths up to 328? (100m) in 5v systems, and lengths up to 200? (62m) in 3.3v systems (see figures 31 and 32). the 460kbps versions can operate at full data rates with lengths of thousands of feet. note t hat system jitter requirements may limit a network to shorter distances. twisted pair is the cable of choice for rs-422 networks. twisted pair cables tend to pick up noise and other electromagnetically induce d voltages as common mode signals, which are effectively rejected by the differential receivers in rs-422 ics. proper termination is imperative, when using the 10mbps or 32mbps devices, to minimize reflections. short networks using the 460kbps versions need not be terminated, but, terminations are recommended unless power dissipation is an overriding concern. in point-to-point, or point-to-mu ltipoint (multiple receivers on bus) networks, the main cable should be terminated in its characteristic impedance (typically 120 ) at the end farthest from the driver. in multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. built-in driver ov erload protection the driver output stages inco rporate short circuit current limiting circuitry which ensures that the output current never exceeds the rs-422 specification. a novel design sets the short circuit current limit depending on the v cc value, so unlike some competing devices, the v cc = 5v short circuit current is only slightly higher than the corresponding v cc = 3.3v level (see figure 12). in the event of a major short circuit condition, devices also include a thermal shutdown featur e that disables the drivers whenever the die temperature becomes excessive. this eliminates the power dissipation, allowing the die to cool. the drivers automatically re-enable after the die temperature drops about 20. if the fault persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. high temperature operation with t a = +125c and v cc = 5.5v, four 100 differentially terminated drivers in the tssop package put the ic at the edge of its maximum allowed junction temperature. using larger termination resistors, a lower maximum supply voltage, or one of the packages with a lower thermal resistance ( ja ) provides more safety margin. when designing for +125c operation, be sure to measure the application?s switching current, and include this in the thermal calculations. low power shutdown mode (isl32179e only) these bicmos transmitters all use a fraction of the power required by their bipolar counterparts, but the qfn version includes a shutdown feature that reduces the already low quiescent i cc by 90%. the isl32179e enters shutdown (shdn) whenever the shdnen pin is high and all four drivers are disabled (see ?pin descriptions? on page 4). note that the enable times from s hdn are longer than the enable times when the ic isn?t in shdn. typical performance curves v cc = v l = 3.3v or 5v, t a = +25c; unless otherwise specified. v l notes apply to the isl32179e only. figure 7. driver output current vs differential output voltage figure 8. driver differential output voltage vs temperature differential output voltage (v) driver output current (ma) 00.51.01.5 3.0 2.5 4.0 5.0 0 10 20 30 40 50 60 70 80 90 100 110 +25c +85c +125c +25c +125c +85c v cc = 3.3v v cc = 5v 2.0 3.5 4.5 temperature (c) differential output voltage (v) 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 -40 -25 -10 5 20 35 50 65 80 95 110 125 r diff = 100 v cc = 3.3v v cc = 5v ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
13 fn6824.0 december 16, 2008 figure 9. driver single-ended (y or z) output current vs output voltage figure 10. driver single-ended (y or z) output current vs output voltage figure 11. supply current vs temperature figure 12. driver output current vs short circuit voltage figure 13. driver differential propagation delay vs temperature (isl32372e, isl32374e, isl32179e, 460kbps option) figure 14. driver skew vs temperature (isl32372e, isl32374e, isl32179e, 460kbps option) typical performance curves v cc = v l = 3.3v or 5v, t a = +25c; unless otherwise specified. v l notes apply to the isl32179e only. (continued) 0 20 40 60 80 100 120 0 0.5 1.0 1.5 2.0 2.5 3.0 y or z output voltage (v) driver output current (ma) +25c +85c +125c +25c +125c +85c v cc = 3.3v 3.3 r diff = v ol v oh y or z output voltage (v) driver output current (ma) 0 20 40 60 80 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 100 120 140 +25c +25c +125c +85c v cc = 5v +125c +85c v ol v oh r diff = temperature (c) i cc (a) 200 250 300 350 400 450 500 -40 -25 -10 5 20 35 50 65 80 95 110 125 en = v cc v cc = 3.3v v cc = 5v output voltage (v) output current (ma) -150 -100 -50 0 50 100 150 -0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 y or z = high y or z = low v cc = 3.3v v cc = 5v v cc = 3.3v v cc = 5v 80 82 84 86 88 90 92 94 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) propagation delay (ns) t ddhl v l = 1.6v to v cc t ddlh 0 10 20 30 40 50 60 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) skew (ns) t ssk v l = 1.6v to v cc t dsk t ssk v cc = 3.3v v cc = 5v v cc = 3.3v or 5v ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
14 fn6824.0 december 16, 2008 figure 15. driver differential propagation delay vs temperature (isl32272e, isl32274e, isl32179e, 10mbps option) figure 16. driver skew vs temperature (isl32272e, isl32274e, isl32179e, 10mbps option) figure 17. driver differential propagation delay vs temperature (ISL32172E, isl32174e, isl32179e, 32mbps option) figure 18. driver skew vs temperature (ISL32172E, isl32174e, isl32179e, 32mbps option) figure 19. driver waveforms, low to high (isl32372e, isl32374e, isl32179e) figure 20. driver waveforms, high to low (isl32372e, isl32374e, isl32179e) typical performance curves v cc = v l = 3.3v or 5v, t a = +25c; unless otherwise specified. v l notes apply to the isl32179e only. (continued) 10 11 12 13 14 15 16 17 18 19 20 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) propagation delay (ns) t ddhl v l = 1.6v, v cc = 3.3v or 5v t ddlh t ddhl t ddlh v l = v cc = 3.3v or 5v 0.5 1.0 1.5 2.0 2.5 3.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) skew (ns) t dsk t ssk v l = 1.6v to v cc 6 7 8 9 10 11 12 13 14 15 16 -40 -25 -10 5 20 35 50 65 80 95 110 125 temperature (c) propagation delay (ns) t ddhl v l = 1.6v, v cc = 3.3v or 5v t ddlh t ddhl t ddlh v l 3v, v cc = 3.3v or 5v temperature (c) skew (ns) 0 0.2 0.4 0.6 0.8 1.0 1.2 -40 -25 -10 5 20 35 50 65 80 95 110 125 t dsk t ssk v l 3v, v cc = 3.3v or 5v t dsk v l = 1.6v, v cc = 3.3v or 5v v l = 1.6v to v cc , v cc = 3.3v or 5v time (40ns/div) driver output (v) r diff = 100 , c d = 50pf 1.5 3.0 driver output (v) di z y 0 -3 -2 -1 0 1 2 3 y - z v cc = 3.3v, v l = 1.6v to v cc 0 vh driver input (v) vh = v cc or v l time (40ns/div) driver output (v) 1.5 3.0 driver output (v) di y z 0 -3 -2 -1 0 1 2 3 y - z r diff = 100 , c d = 50pf v cc = 3.3v, v l = 1.6v to v cc 0 vh driver input (v) vh = v cc or v l ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
15 fn6824.0 december 16, 2008 figure 21. driver waveforms, low to high (isl32372e, isl32374e, isl32179e) figure 22. driver waveforms, high to low (isl32372e, isl32374e, isl32179e) figure 23. driver waveforms, low to high (isl32272e, isl32274e, isl32179e) figure 24. driver waveforms, high to low (isl32272e, isl32274e, isl32179e) figure 25. driver waveforms, low to high (isl32272e, isl32274e, isl32179e) figure 26. driver waveforms, high to low (isl32272e, isl32274e, isl32179e) typical performance curves v cc = v l = 3.3v or 5v, t a = +25c; unless otherwise specified. v l notes apply to the isl32179e only. (continued) time (40ns/div) driver output (v) r diff = 100 , c d = 50pf 2.5 5.0 driver output (v) di z y 0 -5 -4 -2 0 2 4 5 y - z v cc = 5v, v l = 1.6v to v cc 0 vh driver input (v) vh = v cc or v l time (40ns/div) driver output (v) 2.5 5.0 driver output (v) di y z 0 r diff = 100 , c d = 50pf -5 -4 -2 0 2 4 5 y - z v cc = 5v, v l = 1.6v to v cc 0 vh driver input (v) vh = v cc or v l time (10ns/div) driver output (v) r diff = 100 , c d = 50pf 1.5 3.0 driver output (v) di z y 0 -3 -2 -1 0 1 2 3 y - z v cc = 3.3v, v l = 1.6v to v cc 0 vh driver input (v) vh = v cc or v l time (10ns/div) driver output (v) 1.5 3.0 driver output (v) di y z 0 -3 -2 -1 0 1 2 3 y - z r diff = 100 , c d = 50pf v cc = 3.3v, v l = 1.6v to v cc 0 vh driver input (v) vh = v cc or v l time (10ns/div) driver output (v) r diff = 100 , c d = 50pf 2.5 5.0 driver output (v) di z y 0 -5 -4 -2 0 2 4 5 y - z v cc = 5v, v l = 1.6v to v cc 0 vh driver input (v) vh = v cc or v l time (10ns/div) driver output (v) 2.5 5.0 driver output (v) di y z 0 r diff = 100 , c d = 50pf -5 -4 -2 0 2 4 5 y - z v cc = 5v, v l = 1.6v to v cc 0 vh driver input (v) vh = v cc or v l ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
16 fn6824.0 december 16, 2008 figure 27. driver waveforms, low to high (ISL32172E, isl32174e, isl32179e) figure 28. driver waveforms, high to low (ISL32172E, isl32174e, isl32179e) figure 29. driver waveforms, low to high (ISL32172E, isl32174e, isl32179e) figure 30. driver waveforms, high to low (ISL32172E, isl32174e, isl32179e) typical performance curves v cc = v l = 3.3v or 5v, t a = +25c; unless otherwise specified. v l notes apply to the isl32179e only. (continued) time (10ns/div) driver output (v) r diff = 100 , c d = 50pf 1.5 3.0 driver output (v) 0 vh driver input (v) di z y 0 -3 -2 -1 0 1 2 3 y - z v cc = 3.3v, v l = 1.6v to v cc vh = v cc or v l time (10ns/div) driver output (v) 1.5 3.0 driver output (v) 0 vh driver input (v) di y z 0 -3 -2 -1 0 1 2 3 y - z r diff = 100 , c d = 50pf v cc = 3.3v, v l = 1.6v to v cc vh = v cc or v l time (10ns/div) driver output (v) r diff = 100 , c d = 50pf 2.5 5.0 driver output (v) 0 vh driver input (v) di z y 0 -5 -4 -2 0 2 4 5 y - z v cc = 5v, v l = 1.6v to v cc vh = v cc or v l time (10ns/div) driver output (v) 2.5 5.0 driver output (v) 0 vh driver input (v) di y z 0 r diff = 100 , c d = 50pf -5 -4 -2 0 2 4 5 y - z v cc = 5v, v l = 1.6v to v cc vh = v cc or v l ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
17 fn6824.0 december 16, 2008 figure 31. worst case (neg ative) five pulse driver waveforms driving 200 feet (62m) of cat5 cable (single terminated with 121 ) (ISL32172E, isl32174e, isl32179e) figure 32. worst case (negative) five pulse driver waveforms driving 328 feet (100m) of cat5 cable (single terminated with 121 ) (ISL32172E, isl32174e, isl32179e) die characteristics substrate and qfn thermal pad potential (powered up): gnd transistor count: 1682 process: si gate bicmos typical performance curves v cc = v l = 3.3v or 5v, t a = +25c; unless otherwise specified. v l notes apply to the isl32179e only. (continued) time (80ns/div) driver output (v) 0 3 driver input (v) di -3.0 -1.5 0 1.5 3.0 y - z v cc = v l = 3v driver + cable delay (~288ns) driver output (v) -3.0 -1.5 0 1.5 3.0 y - z +125c +85c 32mbps time (80ns/div) 0 5 driver input (v) di v cc = v l = 4.5v driver output (v) -4.5 -1.5 0 1.5 4.5 y - z -3.0 3.0 driver + cable delay (~472ns) driver output (v) -4.5 -1.5 0 1.5 4.5 y - z -3.0 3.0 +125c +85c 32mbps ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e
18 fn6824.0 december 16, 2008 ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e small outline plast ic packages (soic) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include inte rlead flash or protrusions. interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. controlling dimension: millimeter. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 c h 0.25(0.010) b m m m16.15 (jedec ms-012-ac issue c) 16 lead narrow body small outline plastic package symbol inches millimeters notes min max min max a 0.0532 0.0688 1.35 1.75 - a1 0.0040 0.0098 0.10 0.25 - b 0.013 0.020 0.33 0.51 9 c 0.0075 0.0098 0.19 0.25 - d 0.3859 0.3937 9.80 10.00 3 e 0.1497 0.1574 3.80 4.00 4 e 0.050 bsc 1.27 bsc - h 0.2284 0.2440 5.80 6.20 - h 0.0099 0.0196 0.25 0.50 5 l 0.016 0.050 0.40 1.27 6 n16 167 0 8 0 8 - rev. 1 6/05
19 fn6824.0 december 16, 2008 ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e package outline drawing l24.4x4c 24 lead quad flat no-lead plastic package rev 2, 10/06 0 . 90 0 . 1 5 c 0 . 2 ref typical recommended land pattern 0 . 05 max. ( 24x 0 . 6 ) detail "x" ( 24x 0 . 25 ) 0 . 00 min. ( 20x 0 . 5 ) ( 2 . 50 ) side view ( 3 . 8 typ ) base plane 4 top view bottom view 7 12 24x 0 . 4 0 . 1 13 4.00 pin 1 18 index area 24 19 4.00 2.5 0.50 20x 4x see detail "x" - 0 . 05 + 0 . 07 24x 0 . 23 2 . 50 0 . 15 pin #1 corner (c 0 . 25) 1 seating plane 0.08 c 0.10 c c 0.10 m c a b a b (4x) 0.15 located within the zone indicated. the pin #1 indentifier may be unless otherwise specified, tolerance : decimal 0.05 tiebar shown (if present) is a non-functional feature. the configuration of the pin #1 identifier is optional, but must be between 0.15mm and 0.30mm from the terminal tip. dimension b applies to the metallized terminal and is measured dimensions in ( ) for reference only. dimensioning and tolerancing conform to amse y14.5m-1994. 6. either a mold or mark feature. 3. 5. 4. 2. dimensions are in millimeters. 1. notes:
20 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6824.0 december 16, 2008 ISL32172E, isl32272e, isl32372e , isl32174e, isl32274e, isl32374e, isl32179e thin shrink small outline package family (tssop) n (n/2)+1 (n/2) top view a d 0.20 c 2x b a n/2 lead tips b e1 e 0.25 cab m 1 h pin #1 i.d. 0.05 e c 0.10 c n leads side view 0.10 cab m b c see detail ?x? end view detail x a2 0 - 8 gauge plane 0.25 l a1 a l1 seating plane mdp0044 thin shrink small outline package family symbol millimeters tolerance 14 ld 16 ld 20 ld 24 ld 28 ld a 1.20 1.20 1.20 1.20 1.20 max a1 0.10 0.10 0.10 0.10 0.10 0.05 a2 0.90 0.90 0.90 0.90 0.90 0.05 b 0.25 0.25 0.25 0.25 0.25 +0.05/-0.06 c 0.15 0.15 0.15 0.15 0.15 +0.05/-0.06 d 5.00 5.00 6.50 7.80 9.70 0.10 e 6.40 6.40 6.40 6.40 6.40 basic e1 4.40 4.40 4.40 4.40 4.40 0.10 e 0.65 0.65 0.65 0.65 0.65 basic l 0.60 0.60 0.60 0.60 0.60 0.15 l1 1.00 1.00 1.00 1.00 1.00 reference rev. f 2/07 notes: 1. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusions or gate burrs shall not exceed 0.15mm per side. 2. dimension ?e1? does not include interlead flash or protrusions. interlead flash and protrusi ons shall not exceed 0.25mm per side. 3. dimensions ?d? and ?e1? are measured at datum plane h. 4. dimensioning and tolerancing per asme y14.5m - 1994.

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